PSXRecompStudio Runtime status

Implemented foundations

• R3000A execution with delay-slot, exception, COP0, and interrupt behavior under deterministic tests.
• Rust-backed guest memory/MMIO, interrupt controller, timers, and DMA register/timing state reached by the production execution path.
• BIOS-less execution through a partial BIOS HLE registry with explicit unsupported-call diagnostics.
• Rust-owned SIO0 register state, a deterministic empty-port transaction path (0xFF, no /ACK, no IRQ7), and the IRQ7 latch seam for a future device model.
• Rust-owned SPU register/MMIO storage reachable from production CPU memory accesses.
• A managed GPU register/VRAM model with minimal triangle/rectangle rasterization and deterministic frame snapshots.

Important remaining gaps

• GPU production title-execution MMIO integration, DMA2 data movement, GPU IRQ1, and broader rendering features.
• SPU ADPCM, ADSR, mixing, reverb, sound RAM transfer behavior, audio output, and IRQ9.
• Real controller input and the memory-card serial transaction protocol beyond storage-format support.
• CD-ROM command/status/FIFO behavior, DMA3, and IRQ2.
• MDEC and GTE behavior when real-title evidence demonstrates they are required.
• Broader BIOS HLE coverage needed by real titles.

How Runtime work is prioritized

The project does not implement every PS1 subsystem in issue-number order. Unsupported behavior is intended to fail explicitly, and real-title bring-up evidence is used to identify the next generic BIOS or hardware boundary to implement.

Authoritative Runtime documentation

See ARCHITECTURE.md and docs/runtime/architecture.md for the detailed ownership, MMIO, scheduling, GPU, SPU, SIO0, and BIOS contracts.